// Code generated by 'simdgen -o godefs -goroot $GOROOT -arch arm64 -arm64Path $ARM64_ISA_PATH go_arm64.yaml types.yaml categories.yaml'; DO NOT EDIT.

package main

func simdARM64Ops(v11, v21, v31, vgp, vgpv, vfpv regInfo) []opData {
	return []opData{
		{name: "VABS2D", argLength: 1, reg: v11, asm: "VABS", typ: "Vec128"},
		{name: "VABS4S", argLength: 1, reg: v11, asm: "VABS", typ: "Vec128"},
		{name: "VABS8H", argLength: 1, reg: v11, asm: "VABS", typ: "Vec128"},
		{name: "VABS16B", argLength: 1, reg: v11, asm: "VABS", typ: "Vec128"},
		{name: "VADD2D", argLength: 2, reg: v21, asm: "VADD", commutative: true, typ: "Vec128"},
		{name: "VADD4S", argLength: 2, reg: v21, asm: "VADD", commutative: true, typ: "Vec128"},
		{name: "VADD8H", argLength: 2, reg: v21, asm: "VADD", commutative: true, typ: "Vec128"},
		{name: "VADD16B", argLength: 2, reg: v21, asm: "VADD", commutative: true, typ: "Vec128"},
		{name: "VADDP2D", argLength: 2, reg: v21, asm: "VADDP", typ: "Vec128"},
		{name: "VADDP4S", argLength: 2, reg: v21, asm: "VADDP", typ: "Vec128"},
		{name: "VADDP8H", argLength: 2, reg: v21, asm: "VADDP", typ: "Vec128"},
		{name: "VADDV4S", argLength: 1, reg: v11, asm: "VADDV", typ: "Vec128"},
		{name: "VADDV8H", argLength: 1, reg: v11, asm: "VADDV", typ: "Vec128"},
		{name: "VADDV16B", argLength: 1, reg: v11, asm: "VADDV", typ: "Vec128"},
		{name: "VAND16B", argLength: 2, reg: v21, asm: "VAND", commutative: true, typ: "Vec128"},
		{name: "VBIC16B", argLength: 2, reg: v21, asm: "VBIC", typ: "Vec128"},
		{name: "VBIF16B", argLength: 3, reg: v31, asm: "VBIF", typ: "Vec128", resultInArg0: true},
		{name: "VBIT16B", argLength: 3, reg: v31, asm: "VBIT", typ: "Vec128", resultInArg0: true},
		{name: "VCLS4S", argLength: 1, reg: v11, asm: "VCLS", typ: "Vec128"},
		{name: "VCLS8H", argLength: 1, reg: v11, asm: "VCLS", typ: "Vec128"},
		{name: "VCLS16B", argLength: 1, reg: v11, asm: "VCLS", typ: "Vec128"},
		{name: "VCLZ4S", argLength: 1, reg: v11, asm: "VCLZ", typ: "Vec128"},
		{name: "VCLZ8H", argLength: 1, reg: v11, asm: "VCLZ", typ: "Vec128"},
		{name: "VCLZ16B", argLength: 1, reg: v11, asm: "VCLZ", typ: "Vec128"},
		{name: "VCMEQ2D", argLength: 2, reg: v21, asm: "VCMEQ", commutative: true, typ: "Vec128"},
		{name: "VCMEQ4S", argLength: 2, reg: v21, asm: "VCMEQ", commutative: true, typ: "Vec128"},
		{name: "VCMEQ8H", argLength: 2, reg: v21, asm: "VCMEQ", commutative: true, typ: "Vec128"},
		{name: "VCMEQ16B", argLength: 2, reg: v21, asm: "VCMEQ", commutative: true, typ: "Vec128"},
		{name: "VCMGE2D", argLength: 2, reg: v21, asm: "VCMGE", typ: "Vec128"},
		{name: "VCMGE4S", argLength: 2, reg: v21, asm: "VCMGE", typ: "Vec128"},
		{name: "VCMGE8H", argLength: 2, reg: v21, asm: "VCMGE", typ: "Vec128"},
		{name: "VCMGE16B", argLength: 2, reg: v21, asm: "VCMGE", typ: "Vec128"},
		{name: "VCMGT2D", argLength: 2, reg: v21, asm: "VCMGT", typ: "Vec128"},
		{name: "VCMGT4S", argLength: 2, reg: v21, asm: "VCMGT", typ: "Vec128"},
		{name: "VCMGT8H", argLength: 2, reg: v21, asm: "VCMGT", typ: "Vec128"},
		{name: "VCMGT16B", argLength: 2, reg: v21, asm: "VCMGT", typ: "Vec128"},
		{name: "VCMHI2D", argLength: 2, reg: v21, asm: "VCMHI", typ: "Vec128"},
		{name: "VCMHI4S", argLength: 2, reg: v21, asm: "VCMHI", typ: "Vec128"},
		{name: "VCMHI8H", argLength: 2, reg: v21, asm: "VCMHI", typ: "Vec128"},
		{name: "VCMHI16B", argLength: 2, reg: v21, asm: "VCMHI", typ: "Vec128"},
		{name: "VCMHS2D", argLength: 2, reg: v21, asm: "VCMHS", typ: "Vec128"},
		{name: "VCMHS4S", argLength: 2, reg: v21, asm: "VCMHS", typ: "Vec128"},
		{name: "VCMHS8H", argLength: 2, reg: v21, asm: "VCMHS", typ: "Vec128"},
		{name: "VCMHS16B", argLength: 2, reg: v21, asm: "VCMHS", typ: "Vec128"},
		{name: "VCNT16B", argLength: 1, reg: v11, asm: "VCNT", typ: "Vec128"},
		{name: "VEOR16B", argLength: 2, reg: v21, asm: "VEOR", commutative: true, typ: "Vec128"},
		{name: "VFABS2D", argLength: 1, reg: v11, asm: "VFABS", typ: "Vec128"},
		{name: "VFABS4S", argLength: 1, reg: v11, asm: "VFABS", typ: "Vec128"},
		{name: "VFADD2D", argLength: 2, reg: v21, asm: "VFADD", commutative: true, typ: "Vec128"},
		{name: "VFADD4S", argLength: 2, reg: v21, asm: "VFADD", commutative: true, typ: "Vec128"},
		{name: "VFADDP2D", argLength: 2, reg: v21, asm: "VFADDP", typ: "Vec128"},
		{name: "VFADDP4S", argLength: 2, reg: v21, asm: "VFADDP", typ: "Vec128"},
		{name: "VFCMEQ2D", argLength: 2, reg: v21, asm: "VFCMEQ", commutative: true, typ: "Vec128"},
		{name: "VFCMEQ4S", argLength: 2, reg: v21, asm: "VFCMEQ", commutative: true, typ: "Vec128"},
		{name: "VFCMGE2D", argLength: 2, reg: v21, asm: "VFCMGE", typ: "Vec128"},
		{name: "VFCMGE4S", argLength: 2, reg: v21, asm: "VFCMGE", typ: "Vec128"},
		{name: "VFCMGT2D", argLength: 2, reg: v21, asm: "VFCMGT", typ: "Vec128"},
		{name: "VFCMGT4S", argLength: 2, reg: v21, asm: "VFCMGT", typ: "Vec128"},
		{name: "VFCVTL2_4S", argLength: 1, reg: v11, asm: "VFCVTL2", typ: "Vec128"},
		{name: "VFCVTL4S", argLength: 1, reg: v11, asm: "VFCVTL", typ: "Vec128"},
		{name: "VFCVTN2D", argLength: 1, reg: v11, asm: "VFCVTN", typ: "Vec128"},
		{name: "VFCVTN2_2D", argLength: 2, reg: v21, asm: "VFCVTN2", typ: "Vec128", resultInArg0: true},
		{name: "VFCVTZS2D", argLength: 1, reg: v11, asm: "VFCVTZS", typ: "Vec128"},
		{name: "VFCVTZS4S", argLength: 1, reg: v11, asm: "VFCVTZS", typ: "Vec128"},
		{name: "VFCVTZU2D", argLength: 1, reg: v11, asm: "VFCVTZU", typ: "Vec128"},
		{name: "VFCVTZU4S", argLength: 1, reg: v11, asm: "VFCVTZU", typ: "Vec128"},
		{name: "VFDIV2D", argLength: 2, reg: v21, asm: "VFDIV", typ: "Vec128"},
		{name: "VFDIV4S", argLength: 2, reg: v21, asm: "VFDIV", typ: "Vec128"},
		{name: "VFMAX2D", argLength: 2, reg: v21, asm: "VFMAX", commutative: true, typ: "Vec128"},
		{name: "VFMAX4S", argLength: 2, reg: v21, asm: "VFMAX", commutative: true, typ: "Vec128"},
		{name: "VFMAXV4S", argLength: 1, reg: v11, asm: "VFMAXV", typ: "Vec128"},
		{name: "VFMIN2D", argLength: 2, reg: v21, asm: "VFMIN", commutative: true, typ: "Vec128"},
		{name: "VFMIN4S", argLength: 2, reg: v21, asm: "VFMIN", commutative: true, typ: "Vec128"},
		{name: "VFMINV4S", argLength: 1, reg: v11, asm: "VFMINV", typ: "Vec128"},
		{name: "VFMLA2D", argLength: 3, reg: v31, asm: "VFMLA", typ: "Vec128", resultInArg0: true},
		{name: "VFMLA4S", argLength: 3, reg: v31, asm: "VFMLA", typ: "Vec128", resultInArg0: true},
		{name: "VFMUL2D", argLength: 2, reg: v21, asm: "VFMUL", commutative: true, typ: "Vec128"},
		{name: "VFMUL4S", argLength: 2, reg: v21, asm: "VFMUL", commutative: true, typ: "Vec128"},
		{name: "VFNEG2D", argLength: 1, reg: v11, asm: "VFNEG", typ: "Vec128"},
		{name: "VFNEG4S", argLength: 1, reg: v11, asm: "VFNEG", typ: "Vec128"},
		{name: "VFRINTM2D", argLength: 1, reg: v11, asm: "VFRINTM", typ: "Vec128"},
		{name: "VFRINTM4S", argLength: 1, reg: v11, asm: "VFRINTM", typ: "Vec128"},
		{name: "VFRINTN2D", argLength: 1, reg: v11, asm: "VFRINTN", typ: "Vec128"},
		{name: "VFRINTN4S", argLength: 1, reg: v11, asm: "VFRINTN", typ: "Vec128"},
		{name: "VFRINTP2D", argLength: 1, reg: v11, asm: "VFRINTP", typ: "Vec128"},
		{name: "VFRINTP4S", argLength: 1, reg: v11, asm: "VFRINTP", typ: "Vec128"},
		{name: "VFRINTZ2D", argLength: 1, reg: v11, asm: "VFRINTZ", typ: "Vec128"},
		{name: "VFRINTZ4S", argLength: 1, reg: v11, asm: "VFRINTZ", typ: "Vec128"},
		{name: "VFSQRT2D", argLength: 1, reg: v11, asm: "VFSQRT", typ: "Vec128"},
		{name: "VFSQRT4S", argLength: 1, reg: v11, asm: "VFSQRT", typ: "Vec128"},
		{name: "VFSUB2D", argLength: 2, reg: v21, asm: "VFSUB", typ: "Vec128"},
		{name: "VFSUB4S", argLength: 2, reg: v21, asm: "VFSUB", typ: "Vec128"},
		{name: "VMLA4S", argLength: 3, reg: v31, asm: "VMLA", typ: "Vec128", resultInArg0: true},
		{name: "VMLA8H", argLength: 3, reg: v31, asm: "VMLA", typ: "Vec128", resultInArg0: true},
		{name: "VMLA16B", argLength: 3, reg: v31, asm: "VMLA", typ: "Vec128", resultInArg0: true},
		{name: "VMUL4S", argLength: 2, reg: v21, asm: "VMUL", commutative: true, typ: "Vec128"},
		{name: "VMUL8H", argLength: 2, reg: v21, asm: "VMUL", commutative: true, typ: "Vec128"},
		{name: "VMUL16B", argLength: 2, reg: v21, asm: "VMUL", commutative: true, typ: "Vec128"},
		{name: "VNEG2D", argLength: 1, reg: v11, asm: "VNEG", typ: "Vec128"},
		{name: "VNEG4S", argLength: 1, reg: v11, asm: "VNEG", typ: "Vec128"},
		{name: "VNEG8H", argLength: 1, reg: v11, asm: "VNEG", typ: "Vec128"},
		{name: "VNEG16B", argLength: 1, reg: v11, asm: "VNEG", typ: "Vec128"},
		{name: "VNOT16B", argLength: 1, reg: v11, asm: "VNOT", typ: "Vec128"},
		{name: "VORN16B", argLength: 2, reg: v21, asm: "VORN", typ: "Vec128"},
		{name: "VORR16B", argLength: 2, reg: v21, asm: "VORR", commutative: true, typ: "Vec128"},
		{name: "VPMULL2D", argLength: 2, reg: v21, asm: "VPMULL", commutative: true, typ: "Vec128"},
		{name: "VPMULL2_2D", argLength: 2, reg: v21, asm: "VPMULL2", commutative: true, typ: "Vec128"},
		{name: "VSCVTF2D", argLength: 1, reg: v11, asm: "VSCVTF", typ: "Vec128"},
		{name: "VSCVTF4S", argLength: 1, reg: v11, asm: "VSCVTF", typ: "Vec128"},
		{name: "VSMAX4S", argLength: 2, reg: v21, asm: "VSMAX", commutative: true, typ: "Vec128"},
		{name: "VSMAX8H", argLength: 2, reg: v21, asm: "VSMAX", commutative: true, typ: "Vec128"},
		{name: "VSMAX16B", argLength: 2, reg: v21, asm: "VSMAX", commutative: true, typ: "Vec128"},
		{name: "VSMAXV4S", argLength: 1, reg: v11, asm: "VSMAXV", typ: "Vec128"},
		{name: "VSMAXV8H", argLength: 1, reg: v11, asm: "VSMAXV", typ: "Vec128"},
		{name: "VSMAXV16B", argLength: 1, reg: v11, asm: "VSMAXV", typ: "Vec128"},
		{name: "VSMIN4S", argLength: 2, reg: v21, asm: "VSMIN", commutative: true, typ: "Vec128"},
		{name: "VSMIN8H", argLength: 2, reg: v21, asm: "VSMIN", commutative: true, typ: "Vec128"},
		{name: "VSMIN16B", argLength: 2, reg: v21, asm: "VSMIN", commutative: true, typ: "Vec128"},
		{name: "VSMINV4S", argLength: 1, reg: v11, asm: "VSMINV", typ: "Vec128"},
		{name: "VSMINV8H", argLength: 1, reg: v11, asm: "VSMINV", typ: "Vec128"},
		{name: "VSMINV16B", argLength: 1, reg: v11, asm: "VSMINV", typ: "Vec128"},
		{name: "VSMULL2_4S", argLength: 2, reg: v21, asm: "VSMULL2", commutative: true, typ: "Vec128"},
		{name: "VSMULL2_8H", argLength: 2, reg: v21, asm: "VSMULL2", commutative: true, typ: "Vec128"},
		{name: "VSMULL2_16B", argLength: 2, reg: v21, asm: "VSMULL2", commutative: true, typ: "Vec128"},
		{name: "VSMULL4S", argLength: 2, reg: v21, asm: "VSMULL", commutative: true, typ: "Vec128"},
		{name: "VSMULL8H", argLength: 2, reg: v21, asm: "VSMULL", commutative: true, typ: "Vec128"},
		{name: "VSMULL16B", argLength: 2, reg: v21, asm: "VSMULL", commutative: true, typ: "Vec128"},
		{name: "VSQADD2D", argLength: 2, reg: v21, asm: "VSQADD", commutative: true, typ: "Vec128"},
		{name: "VSQADD4S", argLength: 2, reg: v21, asm: "VSQADD", commutative: true, typ: "Vec128"},
		{name: "VSQADD8H", argLength: 2, reg: v21, asm: "VSQADD", commutative: true, typ: "Vec128"},
		{name: "VSQADD16B", argLength: 2, reg: v21, asm: "VSQADD", commutative: true, typ: "Vec128"},
		{name: "VSQSHL2D", argLength: 2, reg: v21, asm: "VSQSHL", typ: "Vec128"},
		{name: "VSQSHL4S", argLength: 2, reg: v21, asm: "VSQSHL", typ: "Vec128"},
		{name: "VSQSHL8H", argLength: 2, reg: v21, asm: "VSQSHL", typ: "Vec128"},
		{name: "VSQSHL16B", argLength: 2, reg: v21, asm: "VSQSHL", typ: "Vec128"},
		{name: "VSQSUB2D", argLength: 2, reg: v21, asm: "VSQSUB", typ: "Vec128"},
		{name: "VSQSUB4S", argLength: 2, reg: v21, asm: "VSQSUB", typ: "Vec128"},
		{name: "VSQSUB8H", argLength: 2, reg: v21, asm: "VSQSUB", typ: "Vec128"},
		{name: "VSQSUB16B", argLength: 2, reg: v21, asm: "VSQSUB", typ: "Vec128"},
		{name: "VSQXTN2D", argLength: 1, reg: v11, asm: "VSQXTN", typ: "Vec128"},
		{name: "VSQXTN2_2D", argLength: 2, reg: v21, asm: "VSQXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VSQXTN2_4S", argLength: 2, reg: v21, asm: "VSQXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VSQXTN2_8H", argLength: 2, reg: v21, asm: "VSQXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VSQXTN4S", argLength: 1, reg: v11, asm: "VSQXTN", typ: "Vec128"},
		{name: "VSQXTN8H", argLength: 1, reg: v11, asm: "VSQXTN", typ: "Vec128"},
		{name: "VSQXTUN2D", argLength: 1, reg: v11, asm: "VSQXTUN", typ: "Vec128"},
		{name: "VSQXTUN2_2D", argLength: 2, reg: v21, asm: "VSQXTUN2", typ: "Vec128", resultInArg0: true},
		{name: "VSQXTUN2_4S", argLength: 2, reg: v21, asm: "VSQXTUN2", typ: "Vec128", resultInArg0: true},
		{name: "VSQXTUN2_8H", argLength: 2, reg: v21, asm: "VSQXTUN2", typ: "Vec128", resultInArg0: true},
		{name: "VSQXTUN4S", argLength: 1, reg: v11, asm: "VSQXTUN", typ: "Vec128"},
		{name: "VSQXTUN8H", argLength: 1, reg: v11, asm: "VSQXTUN", typ: "Vec128"},
		{name: "VSRHADD4S", argLength: 2, reg: v21, asm: "VSRHADD", commutative: true, typ: "Vec128"},
		{name: "VSRHADD8H", argLength: 2, reg: v21, asm: "VSRHADD", commutative: true, typ: "Vec128"},
		{name: "VSRHADD16B", argLength: 2, reg: v21, asm: "VSRHADD", commutative: true, typ: "Vec128"},
		{name: "VSSHL2D", argLength: 2, reg: v21, asm: "VSSHL", typ: "Vec128"},
		{name: "VSSHL4S", argLength: 2, reg: v21, asm: "VSSHL", typ: "Vec128"},
		{name: "VSSHL8H", argLength: 2, reg: v21, asm: "VSSHL", typ: "Vec128"},
		{name: "VSSHL16B", argLength: 2, reg: v21, asm: "VSSHL", typ: "Vec128"},
		{name: "VSUB2D", argLength: 2, reg: v21, asm: "VSUB", typ: "Vec128"},
		{name: "VSUB4S", argLength: 2, reg: v21, asm: "VSUB", typ: "Vec128"},
		{name: "VSUB8H", argLength: 2, reg: v21, asm: "VSUB", typ: "Vec128"},
		{name: "VSUB16B", argLength: 2, reg: v21, asm: "VSUB", typ: "Vec128"},
		{name: "VSXTL2_4S", argLength: 1, reg: v11, asm: "VSXTL2", typ: "Vec128"},
		{name: "VSXTL2_8H", argLength: 1, reg: v11, asm: "VSXTL2", typ: "Vec128"},
		{name: "VSXTL2_16B", argLength: 1, reg: v11, asm: "VSXTL2", typ: "Vec128"},
		{name: "VSXTL4S", argLength: 1, reg: v11, asm: "VSXTL", typ: "Vec128"},
		{name: "VSXTL8H", argLength: 1, reg: v11, asm: "VSXTL", typ: "Vec128"},
		{name: "VSXTL16B", argLength: 1, reg: v11, asm: "VSXTL", typ: "Vec128"},
		{name: "VTBL16B", argLength: 2, reg: v21, asm: "VTBL", typ: "Vec128"},
		{name: "VTBX16B", argLength: 3, reg: v31, asm: "VTBX", typ: "Vec128", resultInArg0: true},
		{name: "VTRN12D", argLength: 2, reg: v21, asm: "VTRN1", typ: "Vec128"},
		{name: "VTRN14S", argLength: 2, reg: v21, asm: "VTRN1", typ: "Vec128"},
		{name: "VTRN18H", argLength: 2, reg: v21, asm: "VTRN1", typ: "Vec128"},
		{name: "VTRN22D", argLength: 2, reg: v21, asm: "VTRN2", typ: "Vec128"},
		{name: "VTRN24S", argLength: 2, reg: v21, asm: "VTRN2", typ: "Vec128"},
		{name: "VTRN28H", argLength: 2, reg: v21, asm: "VTRN2", typ: "Vec128"},
		{name: "VTRN116B", argLength: 2, reg: v21, asm: "VTRN1", typ: "Vec128"},
		{name: "VTRN216B", argLength: 2, reg: v21, asm: "VTRN2", typ: "Vec128"},
		{name: "VUCVTF2D", argLength: 1, reg: v11, asm: "VUCVTF", typ: "Vec128"},
		{name: "VUCVTF4S", argLength: 1, reg: v11, asm: "VUCVTF", typ: "Vec128"},
		{name: "VUMAX4S", argLength: 2, reg: v21, asm: "VUMAX", commutative: true, typ: "Vec128"},
		{name: "VUMAX8H", argLength: 2, reg: v21, asm: "VUMAX", commutative: true, typ: "Vec128"},
		{name: "VUMAX16B", argLength: 2, reg: v21, asm: "VUMAX", commutative: true, typ: "Vec128"},
		{name: "VUMAXV4S", argLength: 1, reg: v11, asm: "VUMAXV", typ: "Vec128"},
		{name: "VUMAXV8H", argLength: 1, reg: v11, asm: "VUMAXV", typ: "Vec128"},
		{name: "VUMAXV16B", argLength: 1, reg: v11, asm: "VUMAXV", typ: "Vec128"},
		{name: "VUMIN4S", argLength: 2, reg: v21, asm: "VUMIN", commutative: true, typ: "Vec128"},
		{name: "VUMIN8H", argLength: 2, reg: v21, asm: "VUMIN", commutative: true, typ: "Vec128"},
		{name: "VUMIN16B", argLength: 2, reg: v21, asm: "VUMIN", commutative: true, typ: "Vec128"},
		{name: "VUMINV4S", argLength: 1, reg: v11, asm: "VUMINV", typ: "Vec128"},
		{name: "VUMINV8H", argLength: 1, reg: v11, asm: "VUMINV", typ: "Vec128"},
		{name: "VUMINV16B", argLength: 1, reg: v11, asm: "VUMINV", typ: "Vec128"},
		{name: "VUMULL2_4S", argLength: 2, reg: v21, asm: "VUMULL2", commutative: true, typ: "Vec128"},
		{name: "VUMULL2_8H", argLength: 2, reg: v21, asm: "VUMULL2", commutative: true, typ: "Vec128"},
		{name: "VUMULL2_16B", argLength: 2, reg: v21, asm: "VUMULL2", commutative: true, typ: "Vec128"},
		{name: "VUMULL4S", argLength: 2, reg: v21, asm: "VUMULL", commutative: true, typ: "Vec128"},
		{name: "VUMULL8H", argLength: 2, reg: v21, asm: "VUMULL", commutative: true, typ: "Vec128"},
		{name: "VUMULL16B", argLength: 2, reg: v21, asm: "VUMULL", commutative: true, typ: "Vec128"},
		{name: "VUQADD2D", argLength: 2, reg: v21, asm: "VUQADD", commutative: true, typ: "Vec128"},
		{name: "VUQADD4S", argLength: 2, reg: v21, asm: "VUQADD", commutative: true, typ: "Vec128"},
		{name: "VUQADD8H", argLength: 2, reg: v21, asm: "VUQADD", commutative: true, typ: "Vec128"},
		{name: "VUQADD16B", argLength: 2, reg: v21, asm: "VUQADD", commutative: true, typ: "Vec128"},
		{name: "VUQSHL2D", argLength: 2, reg: v21, asm: "VUQSHL", typ: "Vec128"},
		{name: "VUQSHL4S", argLength: 2, reg: v21, asm: "VUQSHL", typ: "Vec128"},
		{name: "VUQSHL8H", argLength: 2, reg: v21, asm: "VUQSHL", typ: "Vec128"},
		{name: "VUQSHL16B", argLength: 2, reg: v21, asm: "VUQSHL", typ: "Vec128"},
		{name: "VUQSUB2D", argLength: 2, reg: v21, asm: "VUQSUB", typ: "Vec128"},
		{name: "VUQSUB4S", argLength: 2, reg: v21, asm: "VUQSUB", typ: "Vec128"},
		{name: "VUQSUB8H", argLength: 2, reg: v21, asm: "VUQSUB", typ: "Vec128"},
		{name: "VUQSUB16B", argLength: 2, reg: v21, asm: "VUQSUB", typ: "Vec128"},
		{name: "VUQXTN2D", argLength: 1, reg: v11, asm: "VUQXTN", typ: "Vec128"},
		{name: "VUQXTN2_2D", argLength: 2, reg: v21, asm: "VUQXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VUQXTN2_4S", argLength: 2, reg: v21, asm: "VUQXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VUQXTN2_8H", argLength: 2, reg: v21, asm: "VUQXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VUQXTN4S", argLength: 1, reg: v11, asm: "VUQXTN", typ: "Vec128"},
		{name: "VUQXTN8H", argLength: 1, reg: v11, asm: "VUQXTN", typ: "Vec128"},
		{name: "VURHADD4S", argLength: 2, reg: v21, asm: "VURHADD", commutative: true, typ: "Vec128"},
		{name: "VURHADD8H", argLength: 2, reg: v21, asm: "VURHADD", commutative: true, typ: "Vec128"},
		{name: "VURHADD16B", argLength: 2, reg: v21, asm: "VURHADD", commutative: true, typ: "Vec128"},
		{name: "VUSHL2D", argLength: 2, reg: v21, asm: "VUSHL", typ: "Vec128"},
		{name: "VUSHL4S", argLength: 2, reg: v21, asm: "VUSHL", typ: "Vec128"},
		{name: "VUSHL8H", argLength: 2, reg: v21, asm: "VUSHL", typ: "Vec128"},
		{name: "VUSHL16B", argLength: 2, reg: v21, asm: "VUSHL", typ: "Vec128"},
		{name: "VUXTL2_4S", argLength: 1, reg: v11, asm: "VUXTL2", typ: "Vec128"},
		{name: "VUXTL2_8H", argLength: 1, reg: v11, asm: "VUXTL2", typ: "Vec128"},
		{name: "VUXTL2_16B", argLength: 1, reg: v11, asm: "VUXTL2", typ: "Vec128"},
		{name: "VUXTL4S", argLength: 1, reg: v11, asm: "VUXTL", typ: "Vec128"},
		{name: "VUXTL8H", argLength: 1, reg: v11, asm: "VUXTL", typ: "Vec128"},
		{name: "VUXTL16B", argLength: 1, reg: v11, asm: "VUXTL", typ: "Vec128"},
		{name: "VUZP12D", argLength: 2, reg: v21, asm: "VUZP1", typ: "Vec128"},
		{name: "VUZP14S", argLength: 2, reg: v21, asm: "VUZP1", typ: "Vec128"},
		{name: "VUZP18H", argLength: 2, reg: v21, asm: "VUZP1", typ: "Vec128"},
		{name: "VUZP22D", argLength: 2, reg: v21, asm: "VUZP2", typ: "Vec128"},
		{name: "VUZP24S", argLength: 2, reg: v21, asm: "VUZP2", typ: "Vec128"},
		{name: "VUZP28H", argLength: 2, reg: v21, asm: "VUZP2", typ: "Vec128"},
		{name: "VUZP116B", argLength: 2, reg: v21, asm: "VUZP1", typ: "Vec128"},
		{name: "VUZP216B", argLength: 2, reg: v21, asm: "VUZP2", typ: "Vec128"},
		{name: "VXTN2D", argLength: 1, reg: v11, asm: "VXTN", typ: "Vec128"},
		{name: "VXTN2_2D", argLength: 2, reg: v21, asm: "VXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VXTN2_4S", argLength: 2, reg: v21, asm: "VXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VXTN2_8H", argLength: 2, reg: v21, asm: "VXTN2", typ: "Vec128", resultInArg0: true},
		{name: "VXTN4S", argLength: 1, reg: v11, asm: "VXTN", typ: "Vec128"},
		{name: "VXTN8H", argLength: 1, reg: v11, asm: "VXTN", typ: "Vec128"},
		{name: "VZIP12D", argLength: 2, reg: v21, asm: "VZIP1", typ: "Vec128"},
		{name: "VZIP14S", argLength: 2, reg: v21, asm: "VZIP1", typ: "Vec128"},
		{name: "VZIP18H", argLength: 2, reg: v21, asm: "VZIP1", typ: "Vec128"},
		{name: "VZIP22D", argLength: 2, reg: v21, asm: "VZIP2", typ: "Vec128"},
		{name: "VZIP24S", argLength: 2, reg: v21, asm: "VZIP2", typ: "Vec128"},
		{name: "VZIP28H", argLength: 2, reg: v21, asm: "VZIP2", typ: "Vec128"},
		{name: "VZIP116B", argLength: 2, reg: v21, asm: "VZIP1", typ: "Vec128"},
		{name: "VZIP216B", argLength: 2, reg: v21, asm: "VZIP2", typ: "Vec128"},
		{name: "VDUPBbcast", argLength: 1, reg: v11, asm: "VDUP", aux: "UInt8", typ: "Vec128"},
		{name: "VDUPDbcast", argLength: 1, reg: v11, asm: "VDUP", aux: "UInt8", typ: "Vec128"},
		{name: "VDUPDextr", argLength: 1, reg: v11, asm: "VDUP", aux: "UInt8", typ: "Vec128"},
		{name: "VDUPHbcast", argLength: 1, reg: v11, asm: "VDUP", aux: "UInt8", typ: "Vec128"},
		{name: "VDUPSbcast", argLength: 1, reg: v11, asm: "VDUP", aux: "UInt8", typ: "Vec128"},
		{name: "VDUPSextr", argLength: 1, reg: v11, asm: "VDUP", aux: "UInt8", typ: "Vec128"},
		{name: "VEXT16B", argLength: 2, reg: v21, asm: "VEXT", aux: "UInt8", typ: "Vec128"},
		{name: "VMOVBextr", argLength: 1, reg: vgp, asm: "VMOV", aux: "UInt8", typ: "int8"},
		{name: "VMOVBins", argLength: 2, reg: vgpv, asm: "VMOV", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VMOVDextr", argLength: 1, reg: vgp, asm: "VMOV", aux: "UInt8", typ: "int64"},
		{name: "VMOVDins", argLength: 2, reg: vgpv, asm: "VMOV", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VMOVDins0", argLength: 2, reg: vfpv, asm: "VMOV", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VMOVHextr", argLength: 1, reg: vgp, asm: "VMOV", aux: "UInt8", typ: "int16"},
		{name: "VMOVHins", argLength: 2, reg: vgpv, asm: "VMOV", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VMOVSextr", argLength: 1, reg: vgp, asm: "VMOV", aux: "UInt8", typ: "int32"},
		{name: "VMOVSins", argLength: 2, reg: vgpv, asm: "VMOV", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VMOVSins0", argLength: 2, reg: vfpv, asm: "VMOV", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VSHL2D", argLength: 1, reg: v11, asm: "VSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSHL4S", argLength: 1, reg: v11, asm: "VSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSHL8H", argLength: 1, reg: v11, asm: "VSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSHL16B", argLength: 1, reg: v11, asm: "VSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSHRN2D", argLength: 1, reg: v11, asm: "VSHRN", aux: "UInt8", typ: "Vec128"},
		{name: "VSHRN2_2D", argLength: 2, reg: v21, asm: "VSHRN2", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VSHRN2_4S", argLength: 2, reg: v21, asm: "VSHRN2", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VSHRN2_8H", argLength: 2, reg: v21, asm: "VSHRN2", aux: "UInt8", typ: "Vec128", resultInArg0: true},
		{name: "VSHRN4S", argLength: 1, reg: v11, asm: "VSHRN", aux: "UInt8", typ: "Vec128"},
		{name: "VSHRN8H", argLength: 1, reg: v11, asm: "VSHRN", aux: "UInt8", typ: "Vec128"},
		{name: "VSQSHL2Dconst", argLength: 1, reg: v11, asm: "VSQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSQSHL4Sconst", argLength: 1, reg: v11, asm: "VSQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSQSHL8Hconst", argLength: 1, reg: v11, asm: "VSQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSQSHL16Bconst", argLength: 1, reg: v11, asm: "VSQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHLL2_4S", argLength: 1, reg: v11, asm: "VSSHLL2", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHLL2_8H", argLength: 1, reg: v11, asm: "VSSHLL2", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHLL2_16B", argLength: 1, reg: v11, asm: "VSSHLL2", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHLL4S", argLength: 1, reg: v11, asm: "VSSHLL", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHLL8H", argLength: 1, reg: v11, asm: "VSSHLL", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHLL16B", argLength: 1, reg: v11, asm: "VSSHLL", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHR2D", argLength: 1, reg: v11, asm: "VSSHR", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHR4S", argLength: 1, reg: v11, asm: "VSSHR", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHR8H", argLength: 1, reg: v11, asm: "VSSHR", aux: "UInt8", typ: "Vec128"},
		{name: "VSSHR16B", argLength: 1, reg: v11, asm: "VSSHR", aux: "UInt8", typ: "Vec128"},
		{name: "VUQSHL2Dconst", argLength: 1, reg: v11, asm: "VUQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VUQSHL4Sconst", argLength: 1, reg: v11, asm: "VUQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VUQSHL8Hconst", argLength: 1, reg: v11, asm: "VUQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VUQSHL16Bconst", argLength: 1, reg: v11, asm: "VUQSHL", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHLL2_4S", argLength: 1, reg: v11, asm: "VUSHLL2", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHLL2_8H", argLength: 1, reg: v11, asm: "VUSHLL2", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHLL2_16B", argLength: 1, reg: v11, asm: "VUSHLL2", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHLL4S", argLength: 1, reg: v11, asm: "VUSHLL", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHLL8H", argLength: 1, reg: v11, asm: "VUSHLL", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHLL16B", argLength: 1, reg: v11, asm: "VUSHLL", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHR2D", argLength: 1, reg: v11, asm: "VUSHR", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHR4S", argLength: 1, reg: v11, asm: "VUSHR", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHR8H", argLength: 1, reg: v11, asm: "VUSHR", aux: "UInt8", typ: "Vec128"},
		{name: "VUSHR16B", argLength: 1, reg: v11, asm: "VUSHR", aux: "UInt8", typ: "Vec128"},
	}
}
