// Code generated by 'wasmgen'; DO NOT EDIT.

package main

func simdWasmOps(vload, vstore, v11, v21, v31, v11gp, v11fp32, v11fp64, v1gpv, v1fp32v, v1fp64v, gpv, fp32v, fp64v regInfo) []opData {
	return []opData{
		{name: "I8x16AllTrue", argLength: 1, reg: v11, asm: "I8x16AllTrue", typ: "Bool"},
		{name: "V128AnyTrue", argLength: 1, reg: v11, asm: "V128AnyTrue", typ: "Bool"},
		{name: "I16x8AllTrue", argLength: 1, reg: v11, asm: "I16x8AllTrue", typ: "Bool"},
		{name: "I16x8Q15MulrSatS", argLength: 2, reg: v21, asm: "I16x8Q15MulrSatS", typ: "Vec128"},
		{name: "I16x8RelaxedQ15MulrS", argLength: 2, reg: v21, asm: "I16x8RelaxedQ15MulrS", typ: "Vec128"},
		{name: "I32x4AllTrue", argLength: 1, reg: v11, asm: "I32x4AllTrue", typ: "Bool"},
		{name: "F32x4Pmax", argLength: 2, reg: v21, asm: "F32x4Pmax", commutative: true, typ: "Vec128"},
		{name: "F32x4Pmin", argLength: 2, reg: v21, asm: "F32x4Pmin", commutative: true, typ: "Vec128"},
		{name: "F32x4RelaxedMax", argLength: 2, reg: v21, asm: "F32x4RelaxedMax", commutative: true, typ: "Vec128"},
		{name: "F32x4RelaxedMin", argLength: 2, reg: v21, asm: "F32x4RelaxedMin", commutative: true, typ: "Vec128"},
		{name: "I64x2AllTrue", argLength: 1, reg: v11, asm: "I64x2AllTrue", typ: "Bool"},
		{name: "F64x2Pmax", argLength: 2, reg: v21, asm: "F64x2Pmax", commutative: true, typ: "Vec128"},
		{name: "F64x2Pmin", argLength: 2, reg: v21, asm: "F64x2Pmin", commutative: true, typ: "Vec128"},
		{name: "F64x2RelaxedMax", argLength: 2, reg: v21, asm: "F64x2RelaxedMax", commutative: true, typ: "Vec128"},
		{name: "F64x2RelaxedMin", argLength: 2, reg: v21, asm: "F64x2RelaxedMin", commutative: true, typ: "Vec128"},
		{name: "I8x16Abs", argLength: 1, reg: v11, asm: "I8x16Abs", typ: "Vec128"},
		{name: "I16x8Abs", argLength: 1, reg: v11, asm: "I16x8Abs", typ: "Vec128"},
		{name: "I32x4Abs", argLength: 1, reg: v11, asm: "I32x4Abs", typ: "Vec128"},
		{name: "F32x4Abs", argLength: 1, reg: v11, asm: "F32x4Abs", typ: "Vec128"},
		{name: "I64x2Abs", argLength: 1, reg: v11, asm: "I64x2Abs", typ: "Vec128"},
		{name: "F64x2Abs", argLength: 1, reg: v11, asm: "F64x2Abs", typ: "Vec128"},
		{name: "I8x16Add", argLength: 2, reg: v21, asm: "I8x16Add", commutative: true, typ: "Vec128"},
		{name: "I16x8Add", argLength: 2, reg: v21, asm: "I16x8Add", commutative: true, typ: "Vec128"},
		{name: "I32x4Add", argLength: 2, reg: v21, asm: "I32x4Add", commutative: true, typ: "Vec128"},
		{name: "F32x4Add", argLength: 2, reg: v21, asm: "F32x4Add", commutative: true, typ: "Vec128"},
		{name: "I64x2Add", argLength: 2, reg: v21, asm: "I64x2Add", commutative: true, typ: "Vec128"},
		{name: "F64x2Add", argLength: 2, reg: v21, asm: "F64x2Add", commutative: true, typ: "Vec128"},
		{name: "I8x16AddSatS", argLength: 2, reg: v21, asm: "I8x16AddSatS", commutative: true, typ: "Vec128"},
		{name: "I8x16AddSatU", argLength: 2, reg: v21, asm: "I8x16AddSatU", commutative: true, typ: "Vec128"},
		{name: "I16x8AddSatS", argLength: 2, reg: v21, asm: "I16x8AddSatS", commutative: true, typ: "Vec128"},
		{name: "I16x8AddSatU", argLength: 2, reg: v21, asm: "I16x8AddSatU", commutative: true, typ: "Vec128"},
		{name: "V128And", argLength: 2, reg: v21, asm: "V128And", commutative: true, typ: "Vec128"},
		{name: "V128Andnot", argLength: 2, reg: v21, asm: "V128Andnot", typ: "Vec128"},
		{name: "I8x16AvgrU", argLength: 2, reg: v21, asm: "I8x16AvgrU", commutative: true, typ: "Vec128"},
		{name: "I16x8AvgrU", argLength: 2, reg: v21, asm: "I16x8AvgrU", commutative: true, typ: "Vec128"},
		{name: "V128Bitselect", argLength: 3, reg: v31, asm: "V128Bitselect", typ: "Vec128"},
		{name: "I8x16Splat", argLength: 1, reg: gpv, asm: "I8x16Splat", typ: "Vec128"},
		{name: "I16x8Splat", argLength: 1, reg: gpv, asm: "I16x8Splat", typ: "Vec128"},
		{name: "I32x4Splat", argLength: 1, reg: gpv, asm: "I32x4Splat", typ: "Vec128"},
		{name: "F32x4Splat", argLength: 1, reg: fp32v, asm: "F32x4Splat", typ: "Vec128"},
		{name: "I64x2Splat", argLength: 1, reg: gpv, asm: "I64x2Splat", typ: "Vec128"},
		{name: "F64x2Splat", argLength: 1, reg: fp64v, asm: "F64x2Splat", typ: "Vec128"},
		{name: "F32x4Ceil", argLength: 1, reg: v11, asm: "F32x4Ceil", typ: "Vec128"},
		{name: "F64x2Ceil", argLength: 1, reg: v11, asm: "F64x2Ceil", typ: "Vec128"},
		{name: "F64x2ConvertLowI32x4S", argLength: 1, reg: v11, asm: "F64x2ConvertLowI32x4S", typ: "Vec128"},
		{name: "F64x2ConvertLowI32x4U", argLength: 1, reg: v11, asm: "F64x2ConvertLowI32x4U", typ: "Vec128"},
		{name: "F32x4ConvertI32x4S", argLength: 1, reg: v11, asm: "F32x4ConvertI32x4S", typ: "Vec128"},
		{name: "F32x4ConvertI32x4U", argLength: 1, reg: v11, asm: "F32x4ConvertI32x4U", typ: "Vec128"},
		{name: "I32x4TruncSatF32x4S", argLength: 1, reg: v11, asm: "I32x4TruncSatF32x4S", typ: "Vec128"},
		{name: "I32x4TruncSatF32x4U", argLength: 1, reg: v11, asm: "I32x4TruncSatF32x4U", typ: "Vec128"},
		{name: "F32x4Div", argLength: 2, reg: v21, asm: "F32x4Div", typ: "Vec128"},
		{name: "F64x2Div", argLength: 2, reg: v21, asm: "F64x2Div", typ: "Vec128"},
		{name: "I8x16Eq", argLength: 2, reg: v21, asm: "I8x16Eq", commutative: true, typ: "Vec128"},
		{name: "I16x8Eq", argLength: 2, reg: v21, asm: "I16x8Eq", commutative: true, typ: "Vec128"},
		{name: "I32x4Eq", argLength: 2, reg: v21, asm: "I32x4Eq", commutative: true, typ: "Vec128"},
		{name: "F32x4Eq", argLength: 2, reg: v21, asm: "F32x4Eq", commutative: true, typ: "Vec128"},
		{name: "I64x2Eq", argLength: 2, reg: v21, asm: "I64x2Eq", commutative: true, typ: "Vec128"},
		{name: "F64x2Eq", argLength: 2, reg: v21, asm: "F64x2Eq", commutative: true, typ: "Vec128"},
		{name: "I64x2ExtendHighI32x4S", argLength: 1, reg: v11, asm: "I64x2ExtendHighI32x4S", typ: "Vec128"},
		{name: "I64x2ExtendHighI32x4U", argLength: 1, reg: v11, asm: "I64x2ExtendHighI32x4U", typ: "Vec128"},
		{name: "I32x4ExtendHighI16x8S", argLength: 1, reg: v11, asm: "I32x4ExtendHighI16x8S", typ: "Vec128"},
		{name: "I32x4ExtendHighI16x8U", argLength: 1, reg: v11, asm: "I32x4ExtendHighI16x8U", typ: "Vec128"},
		{name: "I16x8ExtendHighI8x16S", argLength: 1, reg: v11, asm: "I16x8ExtendHighI8x16S", typ: "Vec128"},
		{name: "I16x8ExtendHighI8x16U", argLength: 1, reg: v11, asm: "I16x8ExtendHighI8x16U", typ: "Vec128"},
		{name: "I64x2ExtendLowI32x4S", argLength: 1, reg: v11, asm: "I64x2ExtendLowI32x4S", typ: "Vec128"},
		{name: "I64x2ExtendLowI32x4U", argLength: 1, reg: v11, asm: "I64x2ExtendLowI32x4U", typ: "Vec128"},
		{name: "I32x4ExtendLowI16x8S", argLength: 1, reg: v11, asm: "I32x4ExtendLowI16x8S", typ: "Vec128"},
		{name: "I32x4ExtendLowI16x8U", argLength: 1, reg: v11, asm: "I32x4ExtendLowI16x8U", typ: "Vec128"},
		{name: "I16x8ExtendLowI8x16S", argLength: 1, reg: v11, asm: "I16x8ExtendLowI8x16S", typ: "Vec128"},
		{name: "I16x8ExtendLowI8x16U", argLength: 1, reg: v11, asm: "I16x8ExtendLowI8x16U", typ: "Vec128"},
		{name: "F32x4Floor", argLength: 1, reg: v11, asm: "F32x4Floor", typ: "Vec128"},
		{name: "F64x2Floor", argLength: 1, reg: v11, asm: "F64x2Floor", typ: "Vec128"},
		{name: "I8x16ExtractLaneS", argLength: 1, reg: v11gp, asm: "I8x16ExtractLaneS", aux: "UInt8", typ: "Vec128"},
		{name: "I8x16ExtractLaneU", argLength: 1, reg: v11gp, asm: "I8x16ExtractLaneU", aux: "UInt8", typ: "Vec128"},
		{name: "I16x8ExtractLaneS", argLength: 1, reg: v11gp, asm: "I16x8ExtractLaneS", aux: "UInt8", typ: "Vec128"},
		{name: "I16x8ExtractLaneU", argLength: 1, reg: v11gp, asm: "I16x8ExtractLaneU", aux: "UInt8", typ: "Vec128"},
		{name: "I32x4ExtractLane", argLength: 1, reg: v11gp, asm: "I32x4ExtractLane", aux: "UInt8", typ: "Vec128"},
		{name: "F32x4ExtractLane", argLength: 1, reg: v11fp32, asm: "F32x4ExtractLane", aux: "UInt8", typ: "Vec128"},
		{name: "I64x2ExtractLane", argLength: 1, reg: v11gp, asm: "I64x2ExtractLane", aux: "UInt8", typ: "Vec128"},
		{name: "F64x2ExtractLane", argLength: 1, reg: v11fp64, asm: "F64x2ExtractLane", aux: "UInt8", typ: "Vec128"},
		{name: "I8x16GtS", argLength: 2, reg: v21, asm: "I8x16GtS", typ: "Vec128"},
		{name: "I8x16GtU", argLength: 2, reg: v21, asm: "I8x16GtU", typ: "Vec128"},
		{name: "I16x8GtS", argLength: 2, reg: v21, asm: "I16x8GtS", typ: "Vec128"},
		{name: "I16x8GtU", argLength: 2, reg: v21, asm: "I16x8GtU", typ: "Vec128"},
		{name: "I32x4GtS", argLength: 2, reg: v21, asm: "I32x4GtS", typ: "Vec128"},
		{name: "I32x4GtU", argLength: 2, reg: v21, asm: "I32x4GtU", typ: "Vec128"},
		{name: "F32x4Gt", argLength: 2, reg: v21, asm: "F32x4Gt", typ: "Vec128"},
		{name: "I64x2GtS", argLength: 2, reg: v21, asm: "I64x2GtS", typ: "Vec128"},
		{name: "F64x2Gt", argLength: 2, reg: v21, asm: "F64x2Gt", typ: "Vec128"},
		{name: "I8x16GeS", argLength: 2, reg: v21, asm: "I8x16GeS", typ: "Vec128"},
		{name: "I8x16GeU", argLength: 2, reg: v21, asm: "I8x16GeU", typ: "Vec128"},
		{name: "I16x8GeS", argLength: 2, reg: v21, asm: "I16x8GeS", typ: "Vec128"},
		{name: "I16x8GeU", argLength: 2, reg: v21, asm: "I16x8GeU", typ: "Vec128"},
		{name: "I32x4GeS", argLength: 2, reg: v21, asm: "I32x4GeS", typ: "Vec128"},
		{name: "I32x4GeU", argLength: 2, reg: v21, asm: "I32x4GeU", typ: "Vec128"},
		{name: "F32x4Ge", argLength: 2, reg: v21, asm: "F32x4Ge", typ: "Vec128"},
		{name: "I64x2GeS", argLength: 2, reg: v21, asm: "I64x2GeS", typ: "Vec128"},
		{name: "F64x2Ge", argLength: 2, reg: v21, asm: "F64x2Ge", typ: "Vec128"},
		{name: "I8x16LtS", argLength: 2, reg: v21, asm: "I8x16LtS", typ: "Vec128"},
		{name: "I8x16LtU", argLength: 2, reg: v21, asm: "I8x16LtU", typ: "Vec128"},
		{name: "I16x8LtS", argLength: 2, reg: v21, asm: "I16x8LtS", typ: "Vec128"},
		{name: "I16x8LtU", argLength: 2, reg: v21, asm: "I16x8LtU", typ: "Vec128"},
		{name: "I32x4LtS", argLength: 2, reg: v21, asm: "I32x4LtS", typ: "Vec128"},
		{name: "I32x4LtU", argLength: 2, reg: v21, asm: "I32x4LtU", typ: "Vec128"},
		{name: "F32x4Lt", argLength: 2, reg: v21, asm: "F32x4Lt", typ: "Vec128"},
		{name: "I64x2LtS", argLength: 2, reg: v21, asm: "I64x2LtS", typ: "Vec128"},
		{name: "F64x2Lt", argLength: 2, reg: v21, asm: "F64x2Lt", typ: "Vec128"},
		{name: "I8x16LeS", argLength: 2, reg: v21, asm: "I8x16LeS", typ: "Vec128"},
		{name: "I8x16LeU", argLength: 2, reg: v21, asm: "I8x16LeU", typ: "Vec128"},
		{name: "I16x8LeS", argLength: 2, reg: v21, asm: "I16x8LeS", typ: "Vec128"},
		{name: "I16x8LeU", argLength: 2, reg: v21, asm: "I16x8LeU", typ: "Vec128"},
		{name: "I32x4LeS", argLength: 2, reg: v21, asm: "I32x4LeS", typ: "Vec128"},
		{name: "I32x4LeU", argLength: 2, reg: v21, asm: "I32x4LeU", typ: "Vec128"},
		{name: "F32x4Le", argLength: 2, reg: v21, asm: "F32x4Le", typ: "Vec128"},
		{name: "I64x2LeS", argLength: 2, reg: v21, asm: "I64x2LeS", typ: "Vec128"},
		{name: "F64x2Le", argLength: 2, reg: v21, asm: "F64x2Le", typ: "Vec128"},
		{name: "I8x16Swizzle", argLength: 2, reg: v21, asm: "I8x16Swizzle", typ: "Vec128"},
		{name: "I8x16MaxS", argLength: 2, reg: v21, asm: "I8x16MaxS", commutative: true, typ: "Vec128"},
		{name: "I8x16MaxU", argLength: 2, reg: v21, asm: "I8x16MaxU", commutative: true, typ: "Vec128"},
		{name: "I16x8MaxS", argLength: 2, reg: v21, asm: "I16x8MaxS", commutative: true, typ: "Vec128"},
		{name: "I16x8MaxU", argLength: 2, reg: v21, asm: "I16x8MaxU", commutative: true, typ: "Vec128"},
		{name: "I32x4MaxS", argLength: 2, reg: v21, asm: "I32x4MaxS", commutative: true, typ: "Vec128"},
		{name: "I32x4MaxU", argLength: 2, reg: v21, asm: "I32x4MaxU", commutative: true, typ: "Vec128"},
		{name: "F32x4Max", argLength: 2, reg: v21, asm: "F32x4Max", commutative: true, typ: "Vec128"},
		{name: "F64x2Max", argLength: 2, reg: v21, asm: "F64x2Max", commutative: true, typ: "Vec128"},
		{name: "I8x16MinS", argLength: 2, reg: v21, asm: "I8x16MinS", commutative: true, typ: "Vec128"},
		{name: "I8x16MinU", argLength: 2, reg: v21, asm: "I8x16MinU", commutative: true, typ: "Vec128"},
		{name: "I16x8MinS", argLength: 2, reg: v21, asm: "I16x8MinS", commutative: true, typ: "Vec128"},
		{name: "I16x8MinU", argLength: 2, reg: v21, asm: "I16x8MinU", commutative: true, typ: "Vec128"},
		{name: "I32x4MinS", argLength: 2, reg: v21, asm: "I32x4MinS", commutative: true, typ: "Vec128"},
		{name: "I32x4MinU", argLength: 2, reg: v21, asm: "I32x4MinU", commutative: true, typ: "Vec128"},
		{name: "F32x4Min", argLength: 2, reg: v21, asm: "F32x4Min", commutative: true, typ: "Vec128"},
		{name: "F64x2Min", argLength: 2, reg: v21, asm: "F64x2Min", commutative: true, typ: "Vec128"},
		{name: "I16x8Mul", argLength: 2, reg: v21, asm: "I16x8Mul", commutative: true, typ: "Vec128"},
		{name: "I32x4Mul", argLength: 2, reg: v21, asm: "I32x4Mul", commutative: true, typ: "Vec128"},
		{name: "F32x4Mul", argLength: 2, reg: v21, asm: "F32x4Mul", commutative: true, typ: "Vec128"},
		{name: "I64x2Mul", argLength: 2, reg: v21, asm: "I64x2Mul", commutative: true, typ: "Vec128"},
		{name: "F64x2Mul", argLength: 2, reg: v21, asm: "F64x2Mul", commutative: true, typ: "Vec128"},
		{name: "I16x8ExtmulHighI8x16S", argLength: 2, reg: v21, asm: "I16x8ExtmulHighI8x16S", commutative: true, typ: "Vec128"},
		{name: "I16x8ExtmulHighI8x16U", argLength: 2, reg: v21, asm: "I16x8ExtmulHighI8x16U", commutative: true, typ: "Vec128"},
		{name: "I32x4ExtmulHighI16x8S", argLength: 2, reg: v21, asm: "I32x4ExtmulHighI16x8S", commutative: true, typ: "Vec128"},
		{name: "I32x4ExtmulHighI16x8U", argLength: 2, reg: v21, asm: "I32x4ExtmulHighI16x8U", commutative: true, typ: "Vec128"},
		{name: "I64x2ExtmulHighI32x4S", argLength: 2, reg: v21, asm: "I64x2ExtmulHighI32x4S", commutative: true, typ: "Vec128"},
		{name: "I64x2ExtmulHighI32x4U", argLength: 2, reg: v21, asm: "I64x2ExtmulHighI32x4U", commutative: true, typ: "Vec128"},
		{name: "I16x8ExtmulLowI8x16S", argLength: 2, reg: v21, asm: "I16x8ExtmulLowI8x16S", commutative: true, typ: "Vec128"},
		{name: "I16x8ExtmulLowI8x16U", argLength: 2, reg: v21, asm: "I16x8ExtmulLowI8x16U", commutative: true, typ: "Vec128"},
		{name: "I32x4ExtmulLowI16x8S", argLength: 2, reg: v21, asm: "I32x4ExtmulLowI16x8S", commutative: true, typ: "Vec128"},
		{name: "I32x4ExtmulLowI16x8U", argLength: 2, reg: v21, asm: "I32x4ExtmulLowI16x8U", commutative: true, typ: "Vec128"},
		{name: "I64x2ExtmulLowI32x4S", argLength: 2, reg: v21, asm: "I64x2ExtmulLowI32x4S", commutative: true, typ: "Vec128"},
		{name: "I64x2ExtmulLowI32x4U", argLength: 2, reg: v21, asm: "I64x2ExtmulLowI32x4U", commutative: true, typ: "Vec128"},
		{name: "I8x16Neg", argLength: 1, reg: v11, asm: "I8x16Neg", typ: "Vec128"},
		{name: "I16x8Neg", argLength: 1, reg: v11, asm: "I16x8Neg", typ: "Vec128"},
		{name: "I32x4Neg", argLength: 1, reg: v11, asm: "I32x4Neg", typ: "Vec128"},
		{name: "F32x4Neg", argLength: 1, reg: v11, asm: "F32x4Neg", typ: "Vec128"},
		{name: "I64x2Neg", argLength: 1, reg: v11, asm: "I64x2Neg", typ: "Vec128"},
		{name: "F64x2Neg", argLength: 1, reg: v11, asm: "F64x2Neg", typ: "Vec128"},
		{name: "V128Not", argLength: 1, reg: v11, asm: "V128Not", typ: "Vec128"},
		{name: "I8x16Ne", argLength: 2, reg: v21, asm: "I8x16Ne", commutative: true, typ: "Vec128"},
		{name: "I16x8Ne", argLength: 2, reg: v21, asm: "I16x8Ne", commutative: true, typ: "Vec128"},
		{name: "I32x4Ne", argLength: 2, reg: v21, asm: "I32x4Ne", commutative: true, typ: "Vec128"},
		{name: "F32x4Ne", argLength: 2, reg: v21, asm: "F32x4Ne", commutative: true, typ: "Vec128"},
		{name: "I64x2Ne", argLength: 2, reg: v21, asm: "I64x2Ne", commutative: true, typ: "Vec128"},
		{name: "F64x2Ne", argLength: 2, reg: v21, asm: "F64x2Ne", commutative: true, typ: "Vec128"},
		{name: "I8x16Popcnt", argLength: 1, reg: v11, asm: "I8x16Popcnt", typ: "Vec128"},
		{name: "V128Or", argLength: 2, reg: v21, asm: "V128Or", commutative: true, typ: "Vec128"},
		{name: "F32x4Nearest", argLength: 1, reg: v11, asm: "F32x4Nearest", typ: "Vec128"},
		{name: "F64x2Nearest", argLength: 1, reg: v11, asm: "F64x2Nearest", typ: "Vec128"},
		{name: "I8x16ReplaceLane", argLength: 2, reg: v1gpv, asm: "I8x16ReplaceLane", aux: "UInt8", typ: "Vec128"},
		{name: "I16x8ReplaceLane", argLength: 2, reg: v1gpv, asm: "I16x8ReplaceLane", aux: "UInt8", typ: "Vec128"},
		{name: "I32x4ReplaceLane", argLength: 2, reg: v1gpv, asm: "I32x4ReplaceLane", aux: "UInt8", typ: "Vec128"},
		{name: "F32x4ReplaceLane", argLength: 2, reg: v1fp32v, asm: "F32x4ReplaceLane", aux: "UInt8", typ: "Vec128"},
		{name: "I64x2ReplaceLane", argLength: 2, reg: v1gpv, asm: "I64x2ReplaceLane", aux: "UInt8", typ: "Vec128"},
		{name: "F64x2ReplaceLane", argLength: 2, reg: v1fp64v, asm: "F64x2ReplaceLane", aux: "UInt8", typ: "Vec128"},
		{name: "I8x16Shl", argLength: 2, reg: v1gpv, asm: "I8x16Shl", typ: "Vec128"},
		{name: "I16x8Shl", argLength: 2, reg: v1gpv, asm: "I16x8Shl", typ: "Vec128"},
		{name: "I32x4Shl", argLength: 2, reg: v1gpv, asm: "I32x4Shl", typ: "Vec128"},
		{name: "I64x2Shl", argLength: 2, reg: v1gpv, asm: "I64x2Shl", typ: "Vec128"},
		{name: "I8x16ShrS", argLength: 2, reg: v1gpv, asm: "I8x16ShrS", typ: "Vec128"},
		{name: "I8x16ShrU", argLength: 2, reg: v1gpv, asm: "I8x16ShrU", typ: "Vec128"},
		{name: "I16x8ShrS", argLength: 2, reg: v1gpv, asm: "I16x8ShrS", typ: "Vec128"},
		{name: "I16x8ShrU", argLength: 2, reg: v1gpv, asm: "I16x8ShrU", typ: "Vec128"},
		{name: "I32x4ShrS", argLength: 2, reg: v1gpv, asm: "I32x4ShrS", typ: "Vec128"},
		{name: "I32x4ShrU", argLength: 2, reg: v1gpv, asm: "I32x4ShrU", typ: "Vec128"},
		{name: "I64x2ShrS", argLength: 2, reg: v1gpv, asm: "I64x2ShrS", typ: "Vec128"},
		{name: "I64x2ShrU", argLength: 2, reg: v1gpv, asm: "I64x2ShrU", typ: "Vec128"},
		{name: "F32x4Sqrt", argLength: 1, reg: v11, asm: "F32x4Sqrt", typ: "Vec128"},
		{name: "F64x2Sqrt", argLength: 1, reg: v11, asm: "F64x2Sqrt", typ: "Vec128"},
		{name: "I8x16Sub", argLength: 2, reg: v21, asm: "I8x16Sub", typ: "Vec128"},
		{name: "I16x8Sub", argLength: 2, reg: v21, asm: "I16x8Sub", typ: "Vec128"},
		{name: "I32x4Sub", argLength: 2, reg: v21, asm: "I32x4Sub", typ: "Vec128"},
		{name: "F32x4Sub", argLength: 2, reg: v21, asm: "F32x4Sub", typ: "Vec128"},
		{name: "I64x2Sub", argLength: 2, reg: v21, asm: "I64x2Sub", typ: "Vec128"},
		{name: "F64x2Sub", argLength: 2, reg: v21, asm: "F64x2Sub", typ: "Vec128"},
		{name: "I8x16SubSatS", argLength: 2, reg: v21, asm: "I8x16SubSatS", typ: "Vec128"},
		{name: "I8x16SubSatU", argLength: 2, reg: v21, asm: "I8x16SubSatU", typ: "Vec128"},
		{name: "I16x8SubSatS", argLength: 2, reg: v21, asm: "I16x8SubSatS", typ: "Vec128"},
		{name: "I16x8SubSatU", argLength: 2, reg: v21, asm: "I16x8SubSatU", typ: "Vec128"},
		{name: "F32x4Trunc", argLength: 1, reg: v11, asm: "F32x4Trunc", typ: "Vec128"},
		{name: "F64x2Trunc", argLength: 1, reg: v11, asm: "F64x2Trunc", typ: "Vec128"},
		{name: "V128Xor", argLength: 2, reg: v21, asm: "V128Xor", commutative: true, typ: "Vec128"},
	}
}
