################ M=16 free450

[m16_free450] gate_proj k=5120 n=17408 M=16 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=597, 808 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.0935     30   2767.5   364.9    34.13    66   10251     0%   1.0000
      27b    0.0930     31   2767.5   367.6    34.18    66   10251     0%   1.0062
       70    0.1034     28   2763.8   369.7    38.23    67   10251     0%   0.9046
       40    0.0861     33   2763.8   353.3    30.44    66   10251     0%   1.0859
################ M=16 pin2100

[m16_pin2100] gate_proj k=5120 n=17408 M=16 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=648, 808 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.1212     24   2100.0   213.2    25.84    59   10251     0%   1.0000
      27b    0.1206     24   2100.0   211.9    25.55    59   10251     0%   1.0050
       70    0.1339     21   2100.0   209.5    28.07    59   10251     0%   0.9047
       40    0.1117     26   2100.0   207.4    23.17    59   10251     0%   1.0847
################ M=64 free450

[m64_free450] gate_proj k=5120 n=17408 M=64 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=699, 828 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.0944    121   2760.0   400.1    37.79    71   10251     0%   1.0000
      27b    0.0944    121   2760.0   400.9    37.85    71   10251     0%   1.0005
       70    0.1046    109   2760.0   396.5    41.46    71   10251     0%   0.9031
       40    0.0874    131   2760.0   389.8    34.06    70   10251     0%   1.0808
################ M=64 pin2100

[m64_pin2100] gate_proj k=5120 n=17408 M=64 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=750, 828 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.1220     94   2100.0   223.5    27.26    60   10251     0%   1.0000
      27b    0.1219     94   2100.0   223.9    27.29    60   10251     0%   1.0009
       70    0.1350     84   2100.0   220.2    29.73    60   10251     0%   0.9031
       40    0.1129    101   2100.0   220.9    24.94    60   10251     0%   1.0803
################ M=256 free450

[m256_free450] gate_proj k=5120 n=17408 M=256 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=801, 826 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.1498    305   2688.8   440.6    66.00    74   10251   100%   1.0000
      27b    0.1495    305   2688.8   441.1    65.96    74   10251   100%   1.0018
       70    0.1647    277   2689.5   433.8    71.45    74   10251   100%   0.9094
       40    0.1375    332   2700.0   445.0    61.17    74   10251   100%   1.0897
################ M=256 pin2100

[m256_pin2100] gate_proj k=5120 n=17408 M=256 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=852, 826 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.1869    244   2100.0   275.2    51.45    65   10251     0%   1.0000
      27b    0.1866    245   2100.0   274.4    51.19    66   10251     0%   1.0019
       70    0.2039    224   2100.0   275.4    56.15    66   10251     0%   0.9168
       40    0.1732    263   2100.0   269.2    46.62    65   10251     0%   1.0792
################ M=1024 free450

[m1024_free450] gate_proj k=5120 n=17408 M=1024 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=903, 880 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.4620    395   2388.3   449.3   207.57    76   10251   100%   1.0000
      27b    0.4626    395   2387.5   449.5   207.91    76   10251   100%   0.9987
       70    0.5076    360   2389.2   449.6   228.21    76   10251   100%   0.9101
       40    0.4220    433   2406.0   449.7   189.80    76   10251   100%   1.0946
################ M=1024 pin2100

[m1024_pin2100] gate_proj k=5120 n=17408 M=1024 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=954, 880 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    0.5231    349   2100.0   361.3   189.01    71   10251     0%   1.0000
      27b    0.5230    349   2100.0   361.4   189.03    71   10251     0%   1.0003
       70    0.5743    318   2100.0   360.1   206.79    71   10251     0%   0.9109
       40    0.4815    379   2100.0   353.7   170.32    71   10251     0%   1.0864
################ M=4096 free450

[m4096_free450] gate_proj k=5120 n=17408 M=4096 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=1005, 1118 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    1.7663    413   2305.8   449.6   794.18    76   10251   100%   1.0000
      27b    1.7637    414   2305.5   449.6   792.93    76   10251   100%   1.0015
       70    1.9374    377   2312.0   449.5   870.89    76   10251   100%   0.9117
       40    1.6081    454   2329.2   449.5   722.80    76   10251   100%   1.0984
################ M=4096 pin2100

[m4096_pin2100] gate_proj k=5120 n=17408 M=4096 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=1056, 1118 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    1.9349    377   2100.0   390.9   756.34    73   10251     0%   1.0000
      27b    1.9347    377   2100.0   390.7   755.96    73   10251     0%   1.0001
       70    2.1290    343   2100.0   388.5   827.20    73   10251     0%   0.9088
       40    1.7786    411   2100.0   382.8   680.88    72   10251     0%   1.0879
################ M=8192 free450

[m8192_free450] gate_proj k=5120 n=17408 M=8192 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=1107, 1426 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    3.5232    414   2300.5   449.6  1584.20    76   10251   100%   1.0000
      27b    3.5256    414   2298.8   449.7  1585.39    77   10251   100%   0.9993
       70    3.8717    377   2305.0   449.7  1741.08    76   10251   100%   0.9100
       40    3.1989    457   2319.9   449.7  1438.66    76   10251   100%   1.1014
################ M=8192 pin2100

[m8192_pin2100] gate_proj k=5120 n=17408 M=8192 geo=(128, 128, 128, 1, 4, 2, 8)  rot=8
  tenancy before=(none) after=1158, 1426 MiB
  BLOCKED (each arm alone, its own steady clock, sampled concurrently)
      arm        ms   TOPS   SM MHz       W  mJ/call  degC  memMHz  swcap  ref/arm
       27    3.8519    379   2100.0   391.9  1509.55    73   10251     0%   1.0000
      27b    3.8514    379   2100.0   392.4  1511.20    73   10251     0%   1.0001
       70    4.2394    344   2100.0   389.8  1652.72    73   10251     0%   0.9086
       40    3.5374    413   2100.0   384.6  1360.47    72   10251     0%   1.0889
=== released ===
2100 MHz, 10251 MHz, 450.00 W
# gate_proj k=5120 n=17408 geo=(128, 128, 128, 1, 4, 2, 8) rot=8

== arm 27b against 27 ==
       M    pinned   free450     clock | ref W@pin arm W@pin      dW |  ref MHz  arm MHz   dMHz  swcap
      16   1.0050x   1.0058x   +0.0008 |     213.2     211.9    -1.3 |   2767.5   2767.5   +0.0     0%
      64   1.0009x   1.0003x   -0.0005 |     223.5     223.9    +0.4 |   2760.0   2760.0   +0.0     0%
     256   1.0021x   1.0018x   -0.0003 |     275.2     274.4    -0.9 |   2688.8   2688.8   +0.0   100%
    1024   1.0002x   1.0000x   -0.0003 |     361.3     361.4    +0.1 |   2388.3   2387.5   -0.8   100%
    4096   1.0001x   1.0011x   +0.0010 |     390.9     390.7    -0.1 |   2305.8   2305.5   -0.3   100%
    8192   1.0001x   0.9998x   -0.0004 |     391.9     392.4    +0.5 |   2300.5   2298.8   -1.7   100%

== arm 70 against 27 ==
       M    pinned   free450     clock | ref W@pin arm W@pin      dW |  ref MHz  arm MHz   dMHz  swcap
      16   0.9045x   0.9058x   +0.0014 |     213.2     209.5    -3.7 |   2767.5   2763.8   -3.8     0%
      64   0.9031x   0.9028x   -0.0003 |     223.5     220.2    -3.4 |   2760.0   2760.0   +0.0     0%
     256   0.9166x   0.9103x   -0.0064 |     275.2     275.4    +0.1 |   2688.8   2689.5   +0.8   100%
    1024   0.9109x   0.9117x   +0.0008 |     361.3     360.1    -1.2 |   2388.3   2389.2   +0.9   100%
    4096   0.9088x   0.9144x   +0.0056 |     390.9     388.5    -2.4 |   2305.8   2312.0   +6.2   100%
    8192   0.9086x   0.9106x   +0.0020 |     391.9     389.8    -2.0 |   2300.5   2305.0   +4.5   100%

== arm 40 against 27 ==
       M    pinned   free450     clock | ref W@pin arm W@pin      dW |  ref MHz  arm MHz   dMHz  swcap
      16   1.0847x   1.0870x   +0.0022 |     213.2     207.4    -5.8 |   2767.5   2763.8   -3.8     0%
      64   1.0803x   1.0806x   +0.0003 |     223.5     220.9    -2.6 |   2760.0   2760.0   +0.0     0%
     256   1.0792x   1.0897x   +0.0106 |     275.2     269.2    -6.1 |   2688.8   2700.0  +11.2   100%
    1024   1.0864x   1.0931x   +0.0067 |     361.3     353.7    -7.6 |   2388.3   2406.0  +17.7   100%
    4096   1.0878x   1.0984x   +0.0106 |     390.9     382.8    -8.1 |   2305.8   2329.2  +23.4   100%
    8192   1.0889x   1.0988x   +0.0099 |     391.9     384.6    -7.3 |   2300.5   2319.9  +19.4   100%
