# GATE 2a at every exl3 width -- gate2_mapping.py --bits K
#   RTX 4090, registry.arbi.work/arbi-serve:test-latest,
#   I8_MODEL=/mnt/k8scache/models/Qwen3.8-27B-exl3-4.0bpw
#
# Three things per width, and the third is the one the frozen 8*K stride
# could break without any of the others noticing:
#   - the CHECKPOINT arm, where the checkpoint has a trellis at that width;
#   - the SYNTHETIC arm, which reaches the widths it does not;
#   - the MAINLOOP arm, the staged GEMM, against the exact int8 product of
#     its own operands -- load_B's chunking and the launcher's SMEM sizing
#     are invisible to a per-tile decode.
#
# Every arm carries a control that must fail and does.

checkpoint width census: {4: 408, 6: 1}

  K=1
    (no K=1 trellis in this checkpoint; synthetic arm only)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=5.954e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260152 max-excursion=197  (must be > 0)
      mainloop s30  smem= 18432 B (K=1)  rel-err vs the exact int8 product = 2.42e-04  ok
      mainloop s27  smem= 36864 B (K=1)  rel-err vs the exact int8 product = 2.42e-04  ok
      mainloop s13  smem= 55296 B (K=1)  rel-err vs the exact int8 product = 2.42e-04  ok
      mainloop s31  smem= 17408 B (K=1)  rel-err vs the exact int8 product = 2.42e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.41e+00  (must be >> 1e-3)

[g2a] compared 1 tensor(s) over widths [1]
GATE 2a: PASS

checkpoint width census: {4: 408, 6: 1}

  K=2
    (no K=2 trellis in this checkpoint; synthetic arm only)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=5.992e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260068 max-excursion=207  (must be > 0)
      mainloop s30  smem= 20480 B (K=2)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s27  smem= 40960 B (K=2)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s13  smem= 61440 B (K=2)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s31  smem= 18432 B (K=2)  rel-err vs the exact int8 product = 2.39e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.41e+00  (must be >> 1e-3)

[g2a] compared 1 tensor(s) over widths [2]
GATE 2a: PASS

checkpoint width census: {4: 408, 6: 1}

  K=3
    (no K=3 trellis in this checkpoint; synthetic arm only)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=5.991e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260164 max-excursion=211  (must be > 0)
      mainloop s30  smem= 22528 B (K=3)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s27  smem= 45056 B (K=3)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s13  smem= 67584 B (K=3)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s31  smem= 19456 B (K=3)  rel-err vs the exact int8 product = 2.39e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.41e+00  (must be >> 1e-3)

[g2a] compared 1 tensor(s) over widths [3]
GATE 2a: PASS

checkpoint width census: {4: 408, 6: 1}

  K=4
    ckpt in_proj_qkv                   k=5120   n=10240  outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=8.661e-05
      control (n reversed inside each 16-tile): outside-allowed-set=51944934 max-excursion=252  (must be > 0)
    ckpt in_proj_z                     k=5120   n=6144   outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=7.544e-05
      control (n reversed inside each 16-tile): outside-allowed-set=31185824 max-excursion=238  (must be > 0)
    ckpt out_proj                      k=6144   n=5120   outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=7.543e-05
      control (n reversed inside each 16-tile): outside-allowed-set=31187592 max-excursion=244  (must be > 0)
    ckpt down_proj                     k=17408  n=5120   outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=7.364e-05
      control (n reversed inside each 16-tile): outside-allowed-set=88371852 max-excursion=252  (must be > 0)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=5.957e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260184 max-excursion=205  (must be > 0)
      mainloop s30  smem= 24576 B (K=4)  rel-err vs the exact int8 product = 2.37e-04  ok
      mainloop s27  smem= 49152 B (K=4)  rel-err vs the exact int8 product = 2.37e-04  ok
      mainloop s13  smem= 73728 B (K=4)  rel-err vs the exact int8 product = 2.37e-04  ok
      mainloop s31  smem= 20480 B (K=4)  rel-err vs the exact int8 product = 2.37e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.42e+00  (must be >> 1e-3)

[g2a] compared 5 tensor(s) over widths [4]
GATE 2a: PASS

checkpoint width census: {4: 408, 6: 1}

  K=5
    (no K=5 trellis in this checkpoint; synthetic arm only)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=5.930e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260262 max-excursion=208  (must be > 0)
      mainloop s30  smem= 26624 B (K=5)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s27  smem= 53248 B (K=5)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s13  smem= 79872 B (K=5)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s31  smem= 21504 B (K=5)  rel-err vs the exact int8 product = 2.39e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.41e+00  (must be >> 1e-3)

[g2a] compared 1 tensor(s) over widths [5]
GATE 2a: PASS

checkpoint width census: {4: 408, 6: 1}

  K=6
    ckpt lm_head                       k=5120   n=248320 outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=9.560e-05
      control (n reversed inside each 16-tile): outside-allowed-set=1259096338 max-excursion=244  (must be > 0)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=5.958e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260168 max-excursion=210  (must be > 0)
      mainloop s30  smem= 28672 B (K=6)  rel-err vs the exact int8 product = 2.41e-04  ok
      mainloop s27  smem= 57344 B (K=6)  rel-err vs the exact int8 product = 2.41e-04  ok
      mainloop s13  smem= 86016 B (K=6)  rel-err vs the exact int8 product = 2.41e-04  ok
      mainloop s31  smem= 22528 B (K=6)  rel-err vs the exact int8 product = 2.41e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.42e+00  (must be >> 1e-3)

[g2a] compared 2 tensor(s) over widths [6]
GATE 2a: PASS

checkpoint width census: {4: 408, 6: 1}

  K=7
    (no K=7 trellis in this checkpoint; synthetic arm only)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=6.001e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260194 max-excursion=212  (must be > 0)
      mainloop s30  smem= 30720 B (K=7)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s27  smem= 61440 B (K=7)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s13  smem= 92160 B (K=7)  rel-err vs the exact int8 product = 2.39e-04  ok
      mainloop s31  smem= 23552 B (K=7)  rel-err vs the exact int8 product = 2.39e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.41e+00  (must be >> 1e-3)

[g2a] compared 1 tensor(s) over widths [7]
GATE 2a: PASS

checkpoint width census: {4: 408, 6: 1}

  K=8
    (no K=8 trellis in this checkpoint; synthetic arm only)
    synthetic random trellis           k=512    n=512    outside-allowed-set=0        max-excursion=0 unreachable-fp16=0 rel-MSE=5.991e-05
      control (n reversed inside each 16-tile): outside-allowed-set=260122 max-excursion=202  (must be > 0)
      mainloop s30  smem= 32768 B (K=8)  rel-err vs the exact int8 product = 2.40e-04  ok
      mainloop s27  smem= 65536 B (K=8)  rel-err vs the exact int8 product = 2.40e-04  ok
      mainloop s13  smem= 98304 B (K=8)  rel-err vs the exact int8 product = 2.40e-04  ok
      mainloop s31  smem= 24576 B (K=8)  rel-err vs the exact int8 product = 2.40e-04  ok
      control (reference rolled by one n-tile): rel-err = 1.42e+00  (must be >> 1e-3)

[g2a] compared 1 tensor(s) over widths [8]
GATE 2a: PASS

