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Start with a new design…
Courses
Getting Started
Game-like introduction to ORDeC
CMOS Integrated Circuits
From transistor curves to a 5-transistor OTA in IHP SG13G2
Layout Tutorial
From rectangles and constraints to a DRC/LVS-clean inverter and differential pair (IHP SG13G2).
Examples
Current mirror
NMOS current mirror with DC simulation and device parameter extraction.
Common-source amplifier
IHP SG13G2 amplifier with AC bode plot and transient simulation.
Pseudodifferential VCO
4-phase ring oscillator with
constraint-based layout
using IHP SG13G2.
CMOS 2-input NAND gate
Basic schematic including loops and multiple connection styles.
Differential pair
Diff pair with
constraint-based schematic
(Series/Parallel groups) and DC transfer sweep.
Voltage divider
Resistive divider with DC simulation and SPICE netlist export.
SG13G2 standard cells
Imports the SG13G2 standard cells and runs a simple simulation, DRC and LVS with them.
Voltage divider (Python)
Same voltage divider circuit, written in pure Python.
RC curve (Python)
RC low-pass filter with transient step response and AC frequency sweep, written in pure Python.
Working on a larger project? Use
local mode
to store your designs as files on disk and edit them with your preferred editor.
